branch and jump instruction in RISC-V

* Branch if Equal 
    * General Form: BEQ    Reg1,Reg2,Immed-12
    * Example: BEQ    x4,x9,MyLabel    # If x4==x9 goto MyLabel
    * Description: The contents of Reg1 is compared to the contents of Reg2. If equal, control jumps. The target address is given as a PC-relative offset. More precisely, the offset is sign-extended, multiplied by 2, and added to the value of the PC. The value of the PC used is the address of the instruction following the branch, not the branch itself (???). The offset is multiplied by 2, since all instructions must be halfword aligned. This gives an effective range of -4,096 .. 4,094 (in multiples of 2), relative to the PC. 
    * Comment: Most conditional branches occur within smallish subroutines/functions, so the limited range should be adequate. If the limited size of the offset is inadequate, code such as the following:    
BEQ   x4,x9,MyLabel
must be altered to:    
BNE   x4,x9,Skip   J     MyLabel      # a “long jump”    
Skip:
This applies to all conditional branch instructions. 
    * Encoding:  This is a B-type instruction.
* Branch if Not Equal 
    * General Form: BNE    Reg1,Reg2,Immed-12
    * Example: BNE    x4,x9,MyLabel    # If x4≠x9 goto MyLabel
    * Description: The contents of Reg1 is compared to the contents of Reg2. If not equal, control jumps to a PC-relative target address. 
    * Comment: The target location given by the offset must be within the range of -4,096 .. 4,094 (in multiples of 2), relative to the PC. See the “BEQ” instruction. 
    * Encoding:  This is a B-type instruction.
* Branch if Less Than (Signed) 
    * General Form: BLT    Reg1,Reg2,Immed-12
    * Example: BLT    x4,x9,MyLabel    # If x4<x9 goto MyLabel
    * Description: The contents of Reg1 is compared to the contents of Reg2. If Reg1 is less than Reg2 (using signed comparison), control jumps to a PC-relative target address. 
    * Comment: The target location given by the offset must be within the range of -4,096 .. 4,094 (in multiples of 2), relative to the PC. See the “BEQ” instruction. 
    * Encoding:  This is a B-type instruction. 
* Branch if Less Than Or Equal (Signed) 
    * General Form: BLE    Reg1,Reg2,Immed-12
    * Example: BLE    x4,x9,MyLabel    # If x4<=x9 goto MyLabel
    * Description: The contents of Reg1 is compared to the contents of Reg2. If Reg1 is less than or equal to Reg2 (using signed comparison), control jumps to a PC-relative target address. 
    * Comment: The target location given by the offset must be within the range of -4,096 .. 4,094 (in multiples of 2), relative to the PC. See the “BEQ” instruction. 
    * Encoding: This is a special case of another instruction. This instruction is assembled identically to: 
BGE   Reg2,Reg1,Immed-12  # Note: regs are swapped
* Branch if Greater Than (Signed) 
    * General Form: BGT    Reg1,Reg2,Immed-12
    * Example: BGT    x4,x9,MyLabel    # If x4>x9 goto MyLabel
    * Description: The contents of Reg1 is compared to the contents of Reg2. If Reg1 is greater than Reg2 (using signed comparison), control jumps to a PC-relative target address. 
    * Comment: The target location given by the offset must be within the range of -4,096 .. 4,094 (in multiples of 2), relative to the PC. See the “BEQ” instruction. 
    * Encoding: This is a special case of another instruction. This instruction is assembled identically to: 
BLT   Reg2,Reg1,Immed-12  # Note: regs are swapped
* Branch if Greater Than Or Equal (Signed) 
    * General Form: BGE    Reg1,Reg2,Immed-12
    * Example: BGE    x4,x9,MyLabel    # If x4>=x9 goto MyLabel
    * Description: The contents of Reg1 is compared to the contents of Reg2. If Reg1 is greater than or equal to Reg2 (using signed comparison), control jumps to a PC-relative target address. 
    * Comment: The target location given by the offset must be within the range of -4,096 .. 4,094 (in multiples of 2), relative to the PC. See the “BEQ” instruction. 
    * Encoding:  This is a B-type instruction.
* Branch if Less Than (Unsigned) 
    * General Form: BLTU    Reg1,Reg2,Immed-12
    * Example: BLTU    x4,x9,MyLabel    # If x4<x9 goto MyLabel
    * Description: The contents of Reg1 is compared to the contents of Reg2. If Reg1 is less than Reg2 (using unsigned comparison), control jumps to a PC-relative target address. 
    * Comment: The target location given by the offset must be within the range of -4,096 .. 4,094 (in multiples of 2), relative to the PC. See the “BEQ” instruction. 
    * Encoding:  This is a B-type instruction.
* Branch if Less Than Or Equal (Unsigned) 
    * General Form: BLEU    Reg1,Reg2,Immed-12
    * Example: BLEU    x4,x9,MyLabel    # If x4<=x9 goto MyLabel
    * Description: The contents of Reg1 is compared to the contents of Reg2. If Reg1 is less than or equal to Reg2 (using unsigned comparison), control jumps to a PC-relative target address.
    * Comment: The target location given by the offset must be within the range of -4,096 .. 4,094 (in multiples of 2), relative to the PC. See the “BEQ” instruction. 
    * Encoding: This is a special case of another instruction. This instruction is assembled identically to: BGEU  Reg2,Reg1,Immed-12   # Note: regs are swapped
* Branch if Greater Than (Unsigned) 
    * General Form: BGTU    Reg1,Reg2,Immed-12
    * Example: BGTU    x4,x9,MyLabel    # If x4>x9 goto MyLabel
    * Description: The contents of Reg1 is compared to the contents of Reg2. If Reg1 is greater than Reg2 (using unsigned comparison), control jumps to a PC-relative target address. 
    * Comment: The target location given by the offset must be within the range of -4,096 .. 4,094 (in multiples of 2), relative to the PC. See the “BEQ” instruction. 
    * Encoding: This is a special case of another instruction. This instruction is assembled identically to: 
BLTU  Reg2,Reg1,Immed-12  # Note: regs are swapped
* Branch if Greater Than Or Equal (Unsigned) 
    * General Form: BGEU    Reg1,Reg2,Immed-12
    * Example: BGEU    x4,x9,MyLabel    # If x4>=x9 goto MyLabel
    * Description: The contents of Reg1 is compared to the contents of Reg2. If Reg1 is greater than or equal to Reg2 (using unsigned comparison), control jumps to a PC-relative target address.Comment: The target location given by the offset must be within the range of -4,096 .. 4,094 (in multiples of 2), relative to the PC. See the “BEQ” instruction. 
    * Encoding:  This is a B-type instruction. 
* Jump And Link (Short-Distance CALL) 
    * General Form: JAL    RegD,Immed-20
    * Example: JAL    x1,MyFunct    # Goto MyFunct, x1=RetAddr
    * Description: This instruction is used to call a subroutine (i.e., function). The return address (i.e., the PC, which is the address of the instruction following the JAL) is saved in RegD. 
The target address is given as a PC-relative offset. More precisely, the offset is sign-extended, multiplied by 2, and added to the value of the PC. The value of the PC used is the address of the instruction following the JAL, not the JAL itself (???). The offset is multiplied by 2, since all instructions must be halfword aligned. This gives an effective range of ±1 MiByte, i.e., -1,048,576 .. 1,048,574 (in multiples of 2), relative to the PC. 
Assembler Shorthand: By convention, x1 is generally used as the “link register”. If the register is not mentioned, then x1 is implied. 
JAL MyFunct          # Call MyFunct
    * Comment:The programming convention is to use register x1 as a “link register.” This return address is stored in x1, rather than being pushed onto a stack in memory, thus making calls and returns faster. However, if some routine “foo” will call another routine “bar”, then “foo” must save x1 before calling “bar”. The “foo” routine might push x1 onto a stack in memory, or “foo” might save x1 in a “callee-saved” register in the hope of avoiding any memory access.
    * Exceptions: This may generate an “instruction misaligned exception.” The target address will necessarily be a multiple of 2, but it may not be multiple of 4. For machines that do not support 16-bit instructions, this will cause an alignment exception. 
    * Encoding:  This is a J-type instruction.
* Jump (Short-Distance) General Form: J      Immed-20
    * Example: J      MyLabel    # Goto MyLabel
    * Description: The target address is given as a PC-relative offset. The effective range is ±1 MiByte, i.e., -1,048,576 .. 1,048,574 (in multiples of 2), relative to the PC. 
    * Exceptions: This may generate an “instruction misaligned exception.” The target address will necessarily be a multiple of 2, but it may not be multiple of 4. For machines that do not support 16-bit instructions, this will cause an alignment exception. 
    * Encoding: This is a special case of another instruction. This instruction is assembled identically to: 
JAL   x0,Immed-20     # Discard return address
* Jump And Link Register 
    * General Form: JALR    RegD,Reg1,Immed-12
    * Example: JALR    x1,x4,MyFunct    # Goto MyFunct, x1=RetAddr
    * Description: This instruction is used to call a subroutine (i.e., function). The return address (i.e., the PC, which is the address of the instruction following the JAL) is saved in RegD. 
The target address is computed by adding the offset to the contents of Reg1. More precisely, the offset is sign-extended and added to the value of Reg1. The offset is not multiplied by 2. This gives an effective range of ±2 KiByte, i.e., -2,048 .. 2,047, relative to the address in Reg1. 
    * Comment:This instruction can be used in several ways. See the JR, RET, CALL, and TAIL instructions. 
Assembler Shorthand: By convention, x1 is used as the “link register”. The following form: 
JALR    Reg1           # Call *Reg1
is used short hand for: 
JALR    x0,Reg1,0 
    * Exceptions: This may generate an “instruction misaligned exception.” 
    * Encoding:  This is an I-type instruction.
* Jump Register 
    * General Form: JR      Reg1
    * Example: JR      Reg1    # Goto *Reg1, i.e., PC = Reg1
    * Description: Jump to the address in Reg1. 
    * Exceptions: This may generate an “instruction misaligned exception.” 
    * Encoding: This is a special case of another instruction. This instruction is assembled identically to: 
JALR   x0,Reg1,0    # Discard ret addr; offset=0
* Return 
    * General Form: RET      
    * Example: RET           # Goto *x1, i.e., PC = x1
    * Description: By convention, x1 is used as the “link register” and will hold a return address. This instruction returns from a subroutine/function. 
    * Exceptions: This may generate an “instruction misaligned exception.” 
    * Encoding: This is a special case of another instruction. This instruction is assembled identically to: JALR   x0,x1,0    # PC=x1+0; don’t save prev PC
* Call Faraway Subroutine 
    * General Form: CALL    Immed-32      
    * Example: CALL    MyFunct      # PC = new addr; x1 = ret addr
    * Description: By convention, x1 is used as the “link register” and will hold a return address. This instruction calls a subroutine/function using a PC-relative scheme, where the subroutine offset from the CALL instruction exceeds the 20-bit limit (i.e., ±1 MiByte) of the JAL instruction. This instruction modi2ies register x6. 
Encoding: In order to deal with the larger distance to the subroutine, this “synthetic” instruction will be assembled using the following two-instruction sequence. The target address can be expressed as a 32-bit offset from the Program Counter. This offset is broken into two pieces, which are added to the PC in two steps.
AUIPC  x6,Immed-20    
JALR   x1,x6,Immed-12
The AUIPC instruction adds the PC to the upper 20-bit portion of the 32-bit offset and places the result in a temporary register. The JALR instruction adds in the lower 12 bits of the 32-bit offset and transfers control by loading the sum into the PC. It also saves the return address in x1. 
The CALL instruction makes use of the convention that x1 is the link register. It also uses x6, which is a “caller-saved temporary register” by convention. 
* Tail Call (Faraway Subroutine) / Long-Distance Jump 
    * General Form: TAIL    Immed-32      
    * Example: TAIL    MyFunct     # PC = new addr; Discard ret addr
    * Description: This instruction is used to jump to a distant location using a PC-relative scheme, where the displacement from the TAIL instruction to the target instruction exceeds the 20-bit limit (i.e., ±1 MiByte) of the J instruction (jump short distance). This instruction modi2ies register x6. 
    * Comment: This instruction is nothing more than a long-distance “goto” instruction; the name “TAIL” may be confusing, but re2lects how it will sometimes be used.
    * Encoding: This “synthetic” instruction will be assembled using the following two-instruction sequence. 
AUIPC  x6,Immed-20    
JALR   x0,x6,Immed-12
See the comments for the CALL instruction. The only difference is that here the return address is discarded (x0), instead of being saved in x1. 
    * Exceptions: Like the CALL instruction, this sequence may generate an “instruction misaligned exception.”